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| author | Johan Hovold <johan+linaro@kernel.org> | 2023-02-02 16:54:42 +0100 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2023-02-25 23:34:22 +0100 |
| commit | 430aa33a304654704c16ed7bbbcbec9e9686aa81 (patch) | |
| tree | 0e1e183db8c154c59143910f4a4b9fa0cffef26d /Documentation/arch.rst | |
| parent | c978414bf5190c0474d3c98df95228c2635b6021 (diff) | |
dt-bindings: rtc: qcom-pm8xxx: add nvmem-cell offset
On many Qualcomm platforms the PMIC RTC control and time registers are
read-only so that the RTC time can not be updated. Instead an offset
needs be stored in some machine-specific non-volatile memory, which a
driver can take into account.
Add an 'offset' nvmem cell which can be used to store a 32-bit offset
from the Unix epoch so that the RTC time can be updated on such
platforms.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: David Collins <quic_collinsd@quicinc.com>
Link: https://lore.kernel.org/r/20230202155448.6715-17-johan+linaro@kernel.org
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'Documentation/arch.rst')
0 files changed, 0 insertions, 0 deletions