diff options
| author | Yassine Oudjana <y.oudjana@protonmail.com> | 2023-03-02 15:40:14 +0300 |
|---|---|---|
| committer | Wim Van Sebroeck <wim@linux-watchdog.org> | 2023-04-22 16:01:48 +0200 |
| commit | edb10ace4dcd05f804d59dfdf2fee9121c92faee (patch) | |
| tree | c733d22f5158f8fee6ac957c1e9f3dd6724770c5 | |
| parent | db728ea9c7be137b4f4361295f11e0b56b6286ac (diff) | |
dt-bindings: reset: Add binding for MediaTek MT6735 TOPRGU/WDT
Add a DT binding for the MT6735 top reset generation unit/watchdog timer.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20230302124015.75546-2-y.oudjana@protonmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
| -rw-r--r-- | Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml | 1 | ||||
| -rw-r--r-- | include/dt-bindings/reset/mediatek,mt6735-wdt.h | 17 |
2 files changed, 18 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml index 66cacea8e47f..cc502838bc39 100644 --- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml @@ -22,6 +22,7 @@ properties: - enum: - mediatek,mt2712-wdt - mediatek,mt6589-wdt + - mediatek,mt6735-wdt - mediatek,mt6795-wdt - mediatek,mt7986-wdt - mediatek,mt8183-wdt diff --git a/include/dt-bindings/reset/mediatek,mt6735-wdt.h b/include/dt-bindings/reset/mediatek,mt6735-wdt.h new file mode 100644 index 000000000000..c6056e676d46 --- /dev/null +++ b/include/dt-bindings/reset/mediatek,mt6735-wdt.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ + +#ifndef _DT_BINDINGS_RESET_MEDIATEK_MT6735_WDT_H_ +#define _DT_BINDINGS_RESET_MEDIATEK_MT6735_WDT_H_ + +#define MT6735_TOPRGU_MM_RST 1 +#define MT6735_TOPRGU_MFG_RST 2 +#define MT6735_TOPRGU_VENC_RST 3 +#define MT6735_TOPRGU_VDEC_RST 4 +#define MT6735_TOPRGU_IMG_RST 5 +#define MT6735_TOPRGU_MD_RST 7 +#define MT6735_TOPRGU_CONN_RST 9 +#define MT6735_TOPRGU_C2K_SW_RST 14 +#define MT6735_TOPRGU_C2K_RST 15 +#define MT6735_TOPRGU_RST_NUM 9 + +#endif |