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authorPeter Wang <peter.wang@mediatek.com>2023-12-21 19:04:15 +0800
committerMartin K. Petersen <martin.petersen@oracle.com>2024-01-23 21:06:06 -0500
commit468b3e0a3bca659bff6ddc48d5baeddfd678be7b (patch)
treea3ba6c4d14ec24e8310df29b4d78366b307b06ec
parent29b3a373e2df30b1f8bb9ef8a0d480cce3d0e295 (diff)
scsi: ufs: ufs-mediatek: Fix MCQ mode TM cmd timeout
Fix TM cmd timeout issue in MCQ mode using the default resume call ufshcd_make_hba_operational() to set TM cmd DMA address. This flow is the same as UFS initialization after link startup and then setting MCQ related registers if using MCQ mode. Signed-off-by: Peter Wang <peter.wang@mediatek.com> Link: https://lore.kernel.org/r/20231221110416.16176-3-peter.wang@mediatek.com Reviewed-by: Chun-Hung Wu <chun-hung.wu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
-rw-r--r--drivers/ufs/host/ufs-mediatek.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index dcccb63f74b9..47b5f49cda9d 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1201,9 +1201,11 @@ static int ufs_mtk_link_set_hpm(struct ufs_hba *hba)
}
ufshcd_set_link_active(hba);
- if (!hba->mcq_enabled) {
- err = ufshcd_make_hba_operational(hba);
- } else {
+ err = ufshcd_make_hba_operational(hba);
+ if (err)
+ return err;
+
+ if (is_mcq_enabled(hba)) {
ufs_mtk_config_mcq(hba, false);
ufshcd_mcq_make_queues_operational(hba);
ufshcd_mcq_config_mac(hba, hba->nutrs);
@@ -1212,9 +1214,6 @@ static int ufs_mtk_link_set_hpm(struct ufs_hba *hba)
REG_UFS_MEM_CFG);
}
- if (err)
- return err;
-
return 0;
}