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| author | Arnd Bergmann <arnd@arndb.de> | 2017-01-04 16:33:37 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2017-01-04 16:33:37 +0100 |
| commit | f53c1e6464d3c24583be4f1c1668c54813695da3 (patch) | |
| tree | 2e69b4af7b5557c27e8699cf0e90deb3eb0ce1e8 | |
| parent | 43a8df78dc1a95c24a08f6b776dc86820c117160 (diff) | |
| parent | 368400e242dc04963ca5ff0b70654f1470344a0a (diff) | |
Merge tag 'vexpress-fixes-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into fixes
Pull "ARMv7 VExpress fixes for v4.10" from Sudeep Holla:
A simple fix to extend GICv2 CPU interface registers from 4K to 8K
on VExpress TC1 and TC2 platforms in order to support split priority
drop and interrupt deactivation.
* tag 'vexpress-fixes-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
ARM: dts: vexpress: Support GICC_DIR operations
| -rw-r--r-- | arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts index 102838fcc588..15f4fd3f4695 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts @@ -81,7 +81,7 @@ #address-cells = <0>; interrupt-controller; reg = <0 0x2c001000 0 0x1000>, - <0 0x2c002000 0 0x1000>, + <0 0x2c002000 0 0x2000>, <0 0x2c004000 0 0x2000>, <0 0x2c006000 0 0x2000>; interrupts = <1 9 0xf04>; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts index 45d08cc37b01..bd107c5a0226 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts @@ -131,7 +131,7 @@ #address-cells = <0>; interrupt-controller; reg = <0 0x2c001000 0 0x1000>, - <0 0x2c002000 0 0x1000>, + <0 0x2c002000 0 0x2000>, <0 0x2c004000 0 0x2000>, <0 0x2c006000 0 0x2000>; interrupts = <1 9 0xf04>; |