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authorJiang Jian <jiangjian@cdjrlc.com>2022-06-23 00:02:22 +0800
committerHerbert Xu <herbert@gondor.apana.org.au>2022-06-30 15:56:57 +0800
commite34525c3975832971451cb0908594c310fc83cd5 (patch)
tree8cfd44075a6e489c6965ce71a1ef619b08770b40
parent1b069597c254a2969cf21142c3881b2d5e80c658 (diff)
crypto: cavium - fix typos in comments
Replace 'is' with 'it' file: drivers/crypto/cavium/cpt/cpt_hw_types.h line: 268 * which if the line hits and is is dirty will cause the line to be changed to: * which if the line hits and it is dirty will cause the line to be Signed-off-by: Jiang Jian <jiangjian@cdjrlc.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r--drivers/crypto/cavium/cpt/cpt_hw_types.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/crypto/cavium/cpt/cpt_hw_types.h b/drivers/crypto/cavium/cpt/cpt_hw_types.h
index 96bc963bb804..8ec6edc69f3f 100644
--- a/drivers/crypto/cavium/cpt/cpt_hw_types.h
+++ b/drivers/crypto/cavium/cpt/cpt_hw_types.h
@@ -265,7 +265,7 @@ union cptx_pf_exe_bist_status {
* big-endian format in memory.
* iqb_ldwb:1 [7:7](R/W) Instruction load don't write back.
* 0 = The hardware issues NCB transient load (LDT) towards the cache,
- * which if the line hits and is is dirty will cause the line to be
+ * which if the line hits and it is dirty will cause the line to be
* written back before being replaced.
* 1 = The hardware issues NCB LDWB read-and-invalidate command towards
* the cache when fetching the last word of instructions; as a result the