diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-11-15 14:11:41 -0800 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-11-15 14:11:41 -0800 |
commit | 1bc03573e1c9024d4e4be97df4a1e0931edbae2c (patch) | |
tree | e15933000f9d671114eb739a25f27cb168b0f948 | |
parent | 1be2172e96e33bfa22a5c7a651f768ef30ce3984 (diff) | |
parent | 5bca462d2d18b1c9ec86c7985753134f06fa5cd2 (diff) |
Merge branch 'for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
Pull libata updates from Tejun Heo:
"Nothing too interesting or alarming. Other than a new power saving
mode addition to ahci and crash fix on a tracepoint, all changes are
trivial or device-specific"
* 'for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: (22 commits)
ahci: imx: Handle increased read failures for IMX53 temperature sensor in low frequency mode.
ata: sata_dwc_460ex: Propagate platform device ID to DMA driver
ata: fixes kernel crash while tracing ata_eh_link_autopsy event
ata: pata_pdc2027x: Fix space before '[' error.
libata: fix spelling mistake: 'ambigious' -> 'ambiguous'
ata: ceva: Add SMMU support for SATA IP
ata: ceva: Correct the suspend and resume logic for SATA
ata: ceva: Correct the AXI bus configuration for SATA ports
ata: ceva: Add CCI support for SATA if CCI is enabled
ata: ceva: Make RxWaterMark value as module parameter
ata: ceva: Disable Device Sleep capability
ata: ceva: Add gen 3 mode support in driver
ata: ceva: Move sata port phy oob settings to device-tree
devicetree: bindings: Add sata port phy config parameters in ahci-ceva
ata: mark expected switch fall-throughs
ata: sata_mv: remove a redundant assignment to pointer ehi
ahci: Add support for Cavium's fifth generation SATA controller
ata: sata_rcar: Use of_device_get_match_data() helper
libata: make ata_port_type const
libata: make static arrays const, reduces object code size
...
-rw-r--r-- | Documentation/devicetree/bindings/ata/ahci-ceva.txt | 39 | ||||
-rw-r--r-- | drivers/ata/ahci.c | 9 | ||||
-rw-r--r-- | drivers/ata/ahci_ceva.c | 197 | ||||
-rw-r--r-- | drivers/ata/ahci_imx.c | 2 | ||||
-rw-r--r-- | drivers/ata/libahci_platform.c | 1 | ||||
-rw-r--r-- | drivers/ata/libata-core.c | 8 | ||||
-rw-r--r-- | drivers/ata/libata-eh.c | 14 | ||||
-rw-r--r-- | drivers/ata/libata-scsi.c | 19 | ||||
-rw-r--r-- | drivers/ata/libata.h | 2 | ||||
-rw-r--r-- | drivers/ata/pata_artop.c | 2 | ||||
-rw-r--r-- | drivers/ata/pata_atp867x.c | 2 | ||||
-rw-r--r-- | drivers/ata/pata_pdc2027x.c | 6 | ||||
-rw-r--r-- | drivers/ata/sata_dwc_460ex.c | 1 | ||||
-rw-r--r-- | drivers/ata/sata_mv.c | 8 | ||||
-rw-r--r-- | drivers/ata/sata_rcar.c | 7 | ||||
-rw-r--r-- | include/linux/libata.h | 1 |
16 files changed, 244 insertions, 74 deletions
diff --git a/Documentation/devicetree/bindings/ata/ahci-ceva.txt b/Documentation/devicetree/bindings/ata/ahci-ceva.txt index 7ca8b976c13a..7561cc4de371 100644 --- a/Documentation/devicetree/bindings/ata/ahci-ceva.txt +++ b/Documentation/devicetree/bindings/ata/ahci-ceva.txt @@ -5,6 +5,36 @@ Required properties: - compatible: Compatibility string. Must be 'ceva,ahci-1v84'. - clocks: Input clock specifier. Refer to common clock bindings. - interrupts: Interrupt specifier. Refer to interrupt binding. + - ceva,p0-cominit-params: OOB timing value for COMINIT parameter for port 0. + - ceva,p1-cominit-params: OOB timing value for COMINIT parameter for port 1. + The fields for the above parameter must be as shown below: + ceva,pN-cominit-params = /bits/ 8 <CIBGMN CIBGMX CIBGN CINMP>; + CINMP : COMINIT Negate Minimum Period. + CIBGN : COMINIT Burst Gap Nominal. + CIBGMX: COMINIT Burst Gap Maximum. + CIBGMN: COMINIT Burst Gap Minimum. + - ceva,p0-comwake-params: OOB timing value for COMWAKE parameter for port 0. + - ceva,p1-comwake-params: OOB timing value for COMWAKE parameter for port 1. + The fields for the above parameter must be as shown below: + ceva,pN-comwake-params = /bits/ 8 <CWBGMN CWBGMX CWBGN CWNMP>; + CWBGMN: COMWAKE Burst Gap Minimum. + CWBGMX: COMWAKE Burst Gap Maximum. + CWBGN: COMWAKE Burst Gap Nominal. + CWNMP: COMWAKE Negate Minimum Period. + - ceva,p0-burst-params: Burst timing value for COM parameter for port 0. + - ceva,p1-burst-params: Burst timing value for COM parameter for port 1. + The fields for the above parameter must be as shown below: + ceva,pN-burst-params = /bits/ 8 <BMX BNM SFD PTST>; + BMX: COM Burst Maximum. + BNM: COM Burst Nominal. + SFD: Signal Failure Detection value. + PTST: Partial to Slumber timer value. + - ceva,p0-retry-params: Retry interval timing value for port 0. + - ceva,p1-retry-params: Retry interval timing value for port 1. + The fields for the above parameter must be as shown below: + ceva,pN-retry-params = /bits/ 16 <RIT RCT>; + RIT: Retry Interval Timer. + RCT: Rate Change Timer. Optional properties: - ceva,broken-gen2: limit to gen1 speed instead of gen2. @@ -16,5 +46,14 @@ Examples: interrupt-parent = <&gic>; interrupts = <0 133 4>; clocks = <&clkc SATA_CLK_ID>; + ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>; + ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>; + ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>; + ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>; + + ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>; + ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>; + ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>; + ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>; ceva,broken-gen2; }; diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 9f78bb03bb76..5443cb71d7ba 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -57,6 +57,7 @@ enum { AHCI_PCI_BAR_STA2X11 = 0, AHCI_PCI_BAR_CAVIUM = 0, AHCI_PCI_BAR_ENMOTUS = 2, + AHCI_PCI_BAR_CAVIUM_GEN5 = 4, AHCI_PCI_BAR_STANDARD = 5, }; @@ -1570,8 +1571,12 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) ahci_pci_bar = AHCI_PCI_BAR_STA2X11; else if (pdev->vendor == 0x1c44 && pdev->device == 0x8000) ahci_pci_bar = AHCI_PCI_BAR_ENMOTUS; - else if (pdev->vendor == 0x177d && pdev->device == 0xa01c) - ahci_pci_bar = AHCI_PCI_BAR_CAVIUM; + else if (pdev->vendor == PCI_VENDOR_ID_CAVIUM) { + if (pdev->device == 0xa01c) + ahci_pci_bar = AHCI_PCI_BAR_CAVIUM; + if (pdev->device == 0xa084) + ahci_pci_bar = AHCI_PCI_BAR_CAVIUM_GEN5; + } /* acquire resources */ rc = pcim_enable_device(pdev); diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c index 207649d323c5..5ecc9d46cb54 100644 --- a/drivers/ata/ahci_ceva.c +++ b/drivers/ata/ahci_ceva.c @@ -32,15 +32,27 @@ #define AHCI_VEND_PP3C 0xB0 #define AHCI_VEND_PP4C 0xB4 #define AHCI_VEND_PP5C 0xB8 +#define AHCI_VEND_AXICC 0xBC #define AHCI_VEND_PAXIC 0xC0 #define AHCI_VEND_PTC 0xC8 /* Vendor Specific Register bit definitions */ #define PAXIC_ADBW_BW64 0x1 -#define PAXIC_MAWIDD (1 << 8) -#define PAXIC_MARIDD (1 << 16) +#define PAXIC_MAWID(i) (((i) * 2) << 4) +#define PAXIC_MARID(i) (((i) * 2) << 12) +#define PAXIC_MARIDD(i) ((((i) * 2) + 1) << 16) +#define PAXIC_MAWIDD(i) ((((i) * 2) + 1) << 8) #define PAXIC_OTL (0x4 << 20) +/* Register bit definitions for cache control */ +#define AXICC_ARCA_VAL (0xF << 0) +#define AXICC_ARCF_VAL (0xF << 4) +#define AXICC_ARCH_VAL (0xF << 8) +#define AXICC_ARCP_VAL (0xF << 12) +#define AXICC_AWCFD_VAL (0xF << 16) +#define AXICC_AWCD_VAL (0xF << 20) +#define AXICC_AWCF_VAL (0xF << 24) + #define PCFG_TPSS_VAL (0x32 << 16) #define PCFG_TPRS_VAL (0x2 << 12) #define PCFG_PAD_VAL 0x2 @@ -50,21 +62,6 @@ #define PPCFG_PSS_EN (1 << 29) #define PPCFG_ESDF_EN (1 << 31) -#define PP2C_CIBGMN 0x0F -#define PP2C_CIBGMX (0x25 << 8) -#define PP2C_CIBGN (0x18 << 16) -#define PP2C_CINMP (0x29 << 24) - -#define PP3C_CWBGMN 0x04 -#define PP3C_CWBGMX (0x0B << 8) -#define PP3C_CWBGN (0x08 << 16) -#define PP3C_CWNMP (0x0F << 24) - -#define PP4C_BMX 0x0a -#define PP4C_BNM (0x08 << 8) -#define PP4C_SFD (0x4a << 16) -#define PP4C_PTST (0x06 << 24) - #define PP5C_RIT 0x60216 #define PP5C_RCT (0x7f0 << 20) @@ -75,6 +72,7 @@ #define PORT1_BASE 0x180 /* Port Control Register Bit Definitions */ +#define PORT_SCTL_SPD_GEN3 (0x3 << 4) #define PORT_SCTL_SPD_GEN2 (0x2 << 4) #define PORT_SCTL_SPD_GEN1 (0x1 << 4) #define PORT_SCTL_IPM (0x3 << 8) @@ -85,13 +83,43 @@ #define DRV_NAME "ahci-ceva" #define CEVA_FLAG_BROKEN_GEN2 1 +static unsigned int rx_watermark = PTC_RX_WM_VAL; +module_param(rx_watermark, uint, 0644); +MODULE_PARM_DESC(rx_watermark, "RxWaterMark value (0 - 0x80)"); + struct ceva_ahci_priv { struct platform_device *ahci_pdev; + /* Port Phy2Cfg Register */ + u32 pp2c[NR_PORTS]; + u32 pp3c[NR_PORTS]; + u32 pp4c[NR_PORTS]; + u32 pp5c[NR_PORTS]; + /* Axi Cache Control Register */ + u32 axicc; + bool is_cci_enabled; int flags; }; +static unsigned int ceva_ahci_read_id(struct ata_device *dev, + struct ata_taskfile *tf, u16 *id) +{ + u32 err_mask; + + err_mask = ata_do_dev_read_id(dev, tf, id); + if (err_mask) + return err_mask; + /* + * Since CEVA controller does not support device sleep feature, we + * need to clear DEVSLP (bit 8) in word78 of the IDENTIFY DEVICE data. + */ + id[ATA_ID_FEATURE_SUPP] &= cpu_to_le16(~(1 << 8)); + + return 0; +} + static struct ata_port_operations ahci_ceva_ops = { .inherits = &ahci_platform_ops, + .read_id = ceva_ahci_read_id, }; static const struct ata_port_info ahci_ceva_port_info = { @@ -108,14 +136,6 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv) u32 tmp; int i; - /* - * AXI Data bus width to 64 - * Set Mem Addr Read, Write ID for data transfers - * Transfer limit to 72 DWord - */ - tmp = PAXIC_ADBW_BW64 | PAXIC_MAWIDD | PAXIC_MARIDD | PAXIC_OTL; - writel(tmp, mmio + AHCI_VEND_PAXIC); - /* Set AHCI Enable */ tmp = readl(mmio + HOST_CTL); tmp |= HOST_AHCI_EN; @@ -126,32 +146,48 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv) tmp = PCFG_TPSS_VAL | PCFG_TPRS_VAL | (PCFG_PAD_VAL + i); writel(tmp, mmio + AHCI_VEND_PCFG); + /* + * AXI Data bus width to 64 + * Set Mem Addr Read, Write ID for data transfers + * Set Mem Addr Read ID, Write ID for non-data transfers + * Transfer limit to 72 DWord + */ + tmp = PAXIC_ADBW_BW64 | PAXIC_MAWIDD(i) | PAXIC_MARIDD(i) | + PAXIC_MAWID(i) | PAXIC_MARID(i) | PAXIC_OTL; + writel(tmp, mmio + AHCI_VEND_PAXIC); + + /* Set AXI cache control register if CCi is enabled */ + if (cevapriv->is_cci_enabled) { + tmp = readl(mmio + AHCI_VEND_AXICC); + tmp |= AXICC_ARCA_VAL | AXICC_ARCF_VAL | + AXICC_ARCH_VAL | AXICC_ARCP_VAL | + AXICC_AWCFD_VAL | AXICC_AWCD_VAL | + AXICC_AWCF_VAL; + writel(tmp, mmio + AHCI_VEND_AXICC); + } + /* Port Phy Cfg register enables */ tmp = PPCFG_TTA | PPCFG_PSS_EN | PPCFG_ESDF_EN; writel(tmp, mmio + AHCI_VEND_PPCFG); /* Phy Control OOB timing parameters COMINIT */ - tmp = PP2C_CIBGMN | PP2C_CIBGMX | PP2C_CIBGN | PP2C_CINMP; - writel(tmp, mmio + AHCI_VEND_PP2C); + writel(cevapriv->pp2c[i], mmio + AHCI_VEND_PP2C); /* Phy Control OOB timing parameters COMWAKE */ - tmp = PP3C_CWBGMN | PP3C_CWBGMX | PP3C_CWBGN | PP3C_CWNMP; - writel(tmp, mmio + AHCI_VEND_PP3C); + writel(cevapriv->pp3c[i], mmio + AHCI_VEND_PP3C); /* Phy Control Burst timing setting */ - tmp = PP4C_BMX | PP4C_BNM | PP4C_SFD | PP4C_PTST; - writel(tmp, mmio + AHCI_VEND_PP4C); + writel(cevapriv->pp4c[i], mmio + AHCI_VEND_PP4C); /* Rate Change Timer and Retry Interval Timer setting */ - tmp = PP5C_RIT | PP5C_RCT; - writel(tmp, mmio + AHCI_VEND_PP5C); + writel(cevapriv->pp5c[i], mmio + AHCI_VEND_PP5C); /* Rx Watermark setting */ - tmp = PTC_RX_WM_VAL | PTC_RSVD; + tmp = rx_watermark | PTC_RSVD; writel(tmp, mmio + AHCI_VEND_PTC); - /* Default to Gen 2 Speed and Gen 1 if Gen2 is broken */ - tmp = PORT_SCTL_SPD_GEN2 | PORT_SCTL_IPM; + /* Default to Gen 3 Speed and Gen 1 if Gen2 is broken */ + tmp = PORT_SCTL_SPD_GEN3 | PORT_SCTL_IPM; if (cevapriv->flags & CEVA_FLAG_BROKEN_GEN2) tmp = PORT_SCTL_SPD_GEN1 | PORT_SCTL_IPM; writel(tmp, mmio + PORT_SCR_CTL + PORT_BASE + PORT_OFFSET * i); @@ -168,6 +204,7 @@ static int ceva_ahci_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct ahci_host_priv *hpriv; struct ceva_ahci_priv *cevapriv; + enum dev_dma_attr attr; int rc; cevapriv = devm_kzalloc(dev, sizeof(*cevapriv), GFP_KERNEL); @@ -187,6 +224,65 @@ static int ceva_ahci_probe(struct platform_device *pdev) if (of_property_read_bool(np, "ceva,broken-gen2")) cevapriv->flags = CEVA_FLAG_BROKEN_GEN2; + /* Read OOB timing value for COMINIT from device-tree */ + if (of_property_read_u8_array(np, "ceva,p0-cominit-params", + (u8 *)&cevapriv->pp2c[0], 4) < 0) { + dev_warn(dev, "ceva,p0-cominit-params property not defined\n"); + return -EINVAL; + } + + if (of_property_read_u8_array(np, "ceva,p1-cominit-params", + (u8 *)&cevapriv->pp2c[1], 4) < 0) { + dev_warn(dev, "ceva,p1-cominit-params property not defined\n"); + return -EINVAL; + } + + /* Read OOB timing value for COMWAKE from device-tree*/ + if (of_property_read_u8_array(np, "ceva,p0-comwake-params", + (u8 *)&cevapriv->pp3c[0], 4) < 0) { + dev_warn(dev, "ceva,p0-comwake-params property not defined\n"); + return -EINVAL; + } + + if (of_property_read_u8_array(np, "ceva,p1-comwake-params", + (u8 *)&cevapriv->pp3c[1], 4) < 0) { + dev_warn(dev, "ceva,p1-comwake-params property not defined\n"); + return -EINVAL; + } + + /* Read phy BURST timing value from device-tree */ + if (of_property_read_u8_array(np, "ceva,p0-burst-params", + (u8 *)&cevapriv->pp4c[0], 4) < 0) { + dev_warn(dev, "ceva,p0-burst-params property not defined\n"); + return -EINVAL; + } + + if (of_property_read_u8_array(np, "ceva,p1-burst-params", + (u8 *)&cevapriv->pp4c[1], 4) < 0) { + dev_warn(dev, "ceva,p1-burst-params property not defined\n"); + return -EINVAL; + } + + /* Read phy RETRY interval timing value from device-tree */ + if (of_property_read_u16_array(np, "ceva,p0-retry-params", + (u16 *)&cevapriv->pp5c[0], 2) < 0) { + dev_warn(dev, "ceva,p0-retry-params property not defined\n"); + return -EINVAL; + } + + if (of_property_read_u16_array(np, "ceva,p1-retry-params", + (u16 *)&cevapriv->pp5c[1], 2) < 0) { + dev_warn(dev, "ceva,p1-retry-params property not defined\n"); + return -EINVAL; + } + + /* + * Check if CCI is enabled for SATA. The DEV_DMA_COHERENT is returned + * if CCI is enabled, so check for DEV_DMA_COHERENT. + */ + attr = device_get_dma_attr(dev); + cevapriv->is_cci_enabled = (attr == DEV_DMA_COHERENT); + hpriv->plat_data = cevapriv; /* CEVA specific initialization */ @@ -206,12 +302,37 @@ disable_resources: static int __maybe_unused ceva_ahci_suspend(struct device *dev) { - return ahci_platform_suspend_host(dev); + return ahci_platform_suspend(dev); } static int __maybe_unused ceva_ahci_resume(struct device *dev) { - return ahci_platform_resume_host(dev); + struct ata_host *host = dev_get_drvdata(dev); + struct ahci_host_priv *hpriv = host->private_data; + int rc; + + rc = ahci_platform_enable_resources(hpriv); + if (rc) + return rc; + + /* Configure CEVA specific config before resuming HBA */ + ahci_ceva_setup(hpriv); + + rc = ahci_platform_resume_host(dev); + if (rc) + goto disable_resources; + + /* We resumed so update PM runtime state */ + pm_runtime_disable(dev); + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + + return 0; + +disable_resources: + ahci_platform_disable_resources(hpriv); + + return rc; } static SIMPLE_DEV_PM_OPS(ahci_ceva_pm_ops, ceva_ahci_suspend, ceva_ahci_resume); diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c index 787567e840bd..a58bcc069c54 100644 --- a/drivers/ata/ahci_imx.c +++ b/drivers/ata/ahci_imx.c @@ -230,7 +230,7 @@ static int read_adc_sum(void *dev, u16 rtune_ctl_reg, void __iomem * mmio) { u16 adc_out_reg, read_sum; u32 index, read_attempt; - const u32 attempt_limit = 100; + const u32 attempt_limit = 200; imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_RTUNE_CTL, mmio); imx_phy_reg_write(rtune_ctl_reg, mmio); diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c index a270a1173c8c..341d0ef82cbd 100644 --- a/drivers/ata/libahci_platform.c +++ b/drivers/ata/libahci_platform.c @@ -295,6 +295,7 @@ static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port, node->name); break; } + /* fall through */ case -ENODEV: /* continue normally */ hpriv->phys[port] = NULL; diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index b8ac4902d312..2a882929de4a 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c @@ -1879,6 +1879,7 @@ retry: switch (class) { case ATA_DEV_SEMB: class = ATA_DEV_ATA; /* some hard drives report SEMB sig */ + /* fall through */ case ATA_DEV_ATA: case ATA_DEV_ZAC: tf.command = ATA_CMD_ID_ATA; @@ -2975,6 +2976,7 @@ int ata_bus_probe(struct ata_port *ap) case -ENODEV: /* give it just one more chance */ tries[dev->devno] = min(tries[dev->devno], 1); + /* fall through */ case -EIO: if (tries[dev->devno] == 1) { /* This is the last chance, better to slow @@ -3462,6 +3464,7 @@ int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel) case ATA_DNXFER_FORCE_PIO0: pio_mask &= 1; + /* fall through */ case ATA_DNXFER_FORCE_PIO: mwdma_mask = 0; udma_mask = 0; @@ -3964,6 +3967,7 @@ int sata_link_scr_lpm(struct ata_link *link, enum ata_lpm_policy policy, scontrol &= ~(0x1 << 8); scontrol |= (0x6 << 8); break; + case ATA_LPM_MED_POWER_WITH_DIPM: case ATA_LPM_MIN_POWER: if (ata_link_nr_enabled(link) > 0) /* no restrictions on LPM transitions */ @@ -5823,7 +5827,7 @@ void ata_host_resume(struct ata_host *host) } #endif -struct device_type ata_port_type = { +const struct device_type ata_port_type = { .name = "ata_port", #ifdef CONFIG_PM .pm = &ata_port_pm_ops, @@ -6903,7 +6907,7 @@ static int __init ata_parse_force_one(char **cur, return -EINVAL; } if (nr_matches > 1) { - *reason = "ambigious value"; + *reason = "ambiguous value"; return -EINVAL; } diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c index ece6fd91a947..11c3137d7b0a 100644 --- a/drivers/ata/libata-eh.c +++ b/drivers/ata/libata-eh.c @@ -2264,8 +2264,8 @@ static void ata_eh_link_autopsy(struct ata_link *link) if (dev->flags & ATA_DFLAG_DUBIOUS_XFER) eflags |= ATA_EFLAG_DUBIOUS_XFER; ehc->i.action |= ata_eh_speed_down(dev, eflags, all_err_mask); + trace_ata_eh_link_autopsy(dev, ehc->i.action, all_err_mask); } - trace_ata_eh_link_autopsy(dev, ehc->i.action, all_err_mask); DPRINTK("EXIT\n"); } @@ -3454,9 +3454,9 @@ static int ata_eh_maybe_retry_flush(struct ata_device *dev) * @r_failed_dev: out parameter for failed device * * Enable SATA Interface power management. This will enable - * Device Interface Power Management (DIPM) for min_power - * policy, and then call driver specific callbacks for - * enabling Host Initiated Power management. + * Device Interface Power Management (DIPM) for min_power and + * medium_power_with_dipm policies, and then call driver specific + * callbacks for enabling Host Initiated Power management. * * LOCKING: * EH context. @@ -3502,7 +3502,7 @@ static int ata_eh_set_lpm(struct ata_link *link, enum ata_lpm_policy policy, hints &= ~ATA_LPM_HIPM; /* disable DIPM before changing link config */ - if (policy != ATA_LPM_MIN_POWER && dipm) { + if (policy < ATA_LPM_MED_POWER_WITH_DIPM && dipm) { err_mask = ata_dev_set_feature(dev, SETFEATURES_SATA_DISABLE, SATA_DIPM); if (err_mask && err_mask != AC_ERR_DEV) { @@ -3545,7 +3545,7 @@ static int ata_eh_set_lpm(struct ata_link *link, enum ata_lpm_policy policy, /* host config updated, enable DIPM if transitioning to MIN_POWER */ ata_for_each_dev(dev, link, ENABLED) { - if (policy == ATA_LPM_MIN_POWER && !no_dipm && + if (policy >= ATA_LPM_MED_POWER_WITH_DIPM && !no_dipm && ata_id_has_dipm(dev->id)) { err_mask = ata_dev_set_feature(dev, SETFEATURES_SATA_ENABLE, SATA_DIPM); @@ -3711,9 +3711,11 @@ static int ata_eh_handle_dev_fail(struct ata_device *dev, int err) case -ENODEV: /* device missing or wrong IDENTIFY data, schedule probing */ ehc->i.probe_mask |= (1 << dev->devno); + /* fall through */ case -EINVAL: /* give it just one more chance */ ehc->tries[dev->devno] = min(ehc->tries[dev->devno], 1); + /* fall through */ case -EIO: if (ehc->tries[dev->devno] == 1) { /* This is the last chance, better to slow diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c index 44ba292f2cd7..66be961c93a4 100644 --- a/drivers/ata/libata-scsi.c +++ b/drivers/ata/libata-scsi.c @@ -106,10 +106,11 @@ static const u8 def_control_mpage[CONTROL_MPAGE_LEN] = { }; static const char *ata_lpm_policy_names[] = { - [ATA_LPM_UNKNOWN] = "max_performance", - [ATA_LPM_MAX_POWER] = "max_performance", - [ATA_LPM_MED_POWER] = "medium_power", - [ATA_LPM_MIN_POWER] = "min_power", + [ATA_LPM_UNKNOWN] = "max_performance", + [ATA_LPM_MAX_POWER] = "max_performance", + [ATA_LPM_MED_POWER] = "medium_power", + [ATA_LPM_MED_POWER_WITH_DIPM] = "med_power_with_dipm", + [ATA_LPM_MIN_POWER] = "min_power", }; static ssize_t ata_scsi_lpm_store(struct device *device, @@ -2145,7 +2146,7 @@ static void ata_scsi_rbuf_fill(struct ata_scsi_args *args, */ static unsigned int ata_scsiop_inq_std(struct ata_scsi_args *args, u8 *rbuf) { - const u8 versions[] = { + static const u8 versions[] = { 0x00, 0x60, /* SAM-3 (no version claimed) */ @@ -2155,7 +2156,7 @@ static unsigned int ata_scsiop_inq_std(struct ata_scsi_args *args, u8 *rbuf) 0x03, 0x00 /* SPC-3 (no version claimed) */ }; - const u8 versions_zbc[] = { + static const u8 versions_zbc[] = { 0x00, 0xA0, /* SAM-5 (no version claimed) */ @@ -2227,7 +2228,7 @@ static unsigned int ata_scsiop_inq_std(struct ata_scsi_args *args, u8 *rbuf) static unsigned int ata_scsiop_inq_00(struct ata_scsi_args *args, u8 *rbuf) { int num_pages; - const u8 pages[] = { + static const u8 pages[] = { 0x00, /* page 0x00, this page */ 0x80, /* page 0x80, unit serial no page */ 0x83, /* page 0x83, device ident page */ @@ -2258,7 +2259,7 @@ static unsigned int ata_scsiop_inq_00(struct ata_scsi_args *args, u8 *rbuf) */ static unsigned int ata_scsiop_inq_80(struct ata_scsi_args *args, u8 *rbuf) { - const u8 hdr[] = { + static const u8 hdr[] = { 0, 0x80, /* this page code */ 0, @@ -2580,7 +2581,7 @@ static unsigned int ata_scsiop_mode_sense(struct ata_scsi_args *args, u8 *rbuf) { struct ata_device *dev = args->dev; u8 *scsicmd = args->cmd->cmnd, *p = rbuf; - const u8 sat_blk_desc[] = { + static const u8 sat_blk_desc[] = { 0, 0, 0, 0, /* number of blocks: sat unspecified */ 0, 0, 0x2, 0x0 /* block length: 512 bytes */ diff --git a/drivers/ata/libata.h b/drivers/ata/libata.h index 08a245b76417..f953cb4bb1ba 100644 --- a/drivers/ata/libata.h +++ b/drivers/ata/libata.h @@ -51,7 +51,7 @@ extern int atapi_passthru16; extern int libata_fua; extern int libata_noacpi; extern int libata_allow_tpm; -extern struct device_type ata_port_type; +extern const struct device_type ata_port_type; extern struct ata_link *ata_dev_phys_link(struct ata_device *dev); extern void ata_force_cbl(struct ata_port *ap); extern u64 ata_tf_to_lba(const struct ata_taskfile *tf); diff --git a/drivers/ata/pata_artop.c b/drivers/ata/pata_artop.c index 96c05c9494fa..6b3355343542 100644 --- a/drivers/ata/pata_artop.c +++ b/drivers/ata/pata_artop.c @@ -242,7 +242,7 @@ static void artop6210_set_dmamode (struct ata_port *ap, struct ata_device *adev) static void artop6260_set_dmamode (struct ata_port *ap, struct ata_device *adev) { - unsigned int pio = adev->pio_mode - XFER_PIO_0; + unsigned int pio; struct pci_dev *pdev = to_pci_dev(ap->host->dev); u8 ultra; diff --git a/drivers/ata/pata_atp867x.c b/drivers/ata/pata_atp867x.c index 3ea50dc5ea47..3729e2448eb6 100644 --- a/drivers/ata/pata_atp867x.c +++ b/drivers/ata/pata_atp867x.c @@ -171,6 +171,7 @@ static int atp867x_get_active_clocks_shifted(struct ata_port *ap, default: printk(KERN_WARNING "ATP867X: active %dclk is invalid. " "Using 12clk.\n", clk); + /* fall through */ case 9 ... 12: clocks = 7; /* 12 clk */ break; @@ -203,6 +204,7 @@ static int atp867x_get_recover_clocks_shifted(unsigned int clk) default: printk(KERN_WARNING "ATP867X: recover %dclk is invalid. " "Using default 12clk.\n", clk); + /* fall through */ case 12: /* default 12 clk */ clocks = 0; break; diff --git a/drivers/ata/pata_pdc2027x.c b/drivers/ata/pata_pdc2027x.c index 82bfd51692f3..ffd8d33c6e0f 100644 --- a/drivers/ata/pata_pdc2027x.c +++ b/drivers/ata/pata_pdc2027x.c @@ -84,7 +84,7 @@ static int pdc2027x_set_mode(struct ata_link *link, struct ata_device **r_failed */ static struct pdc2027x_pio_timing { u8 value0, value1, value2; -} pdc2027x_pio_timing_tbl [] = { +} pdc2027x_pio_timing_tbl[] = { { 0xfb, 0x2b, 0xac }, /* PIO mode 0 */ { 0x46, 0x29, 0xa4 }, /* PIO mode 1 */ { 0x23, 0x26, 0x64 }, /* PIO mode 2 */ @@ -94,7 +94,7 @@ static struct pdc2027x_pio_timing { static struct pdc2027x_mdma_timing { u8 value0, value1; -} pdc2027x_mdma_timing_tbl [] = { +} pdc2027x_mdma_timing_tbl[] = { { 0xdf, 0x5f }, /* MDMA mode 0 */ { 0x6b, 0x27 }, /* MDMA mode 1 */ { 0x69, 0x25 }, /* MDMA mode 2 */ @@ -102,7 +102,7 @@ static struct pdc2027x_mdma_timing { static struct pdc2027x_udma_timing { u8 value0, value1, value2; -} pdc2027x_udma_timing_tbl [] = { +} pdc2027x_udma_timing_tbl[] = { { 0x4a, 0x0f, 0xd5 }, /* UDMA mode 0 */ { 0x3a, 0x0a, 0xd0 }, /* UDMA mode 1 */ { 0x2a, 0x07, 0xcd }, /* UDMA mode 2 */ diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c index ce128d5a6ded..6af4ec3c88c3 100644 --- a/drivers/ata/sata_dwc_460ex.c +++ b/drivers/ata/sata_dwc_460ex.c @@ -248,6 +248,7 @@ static int sata_dwc_dma_init_old(struct platform_device *pdev, return -ENOMEM; hsdev->dma->dev = &pdev->dev; + hsdev->dma->id = pdev->id; /* Get SATA DMA interrupt number */ hsdev->dma->irq = irq_of_parse_and_map(np, 1); diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index 3b2246dded74..cc208b72b199 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c @@ -2387,7 +2387,7 @@ static unsigned int mv_qc_issue(struct ata_queued_cmd *qc) ": attempting PIO w/multiple DRQ: " "this may fail due to h/w errata\n"); } - /* drop through */ + /* fall through */ case ATA_PROT_NODATA: case ATAPI_PROT_PIO: case ATAPI_PROT_NODATA: @@ -2478,20 +2478,18 @@ static unsigned int mv_get_err_pmp_map(struct ata_port *ap) static void mv_pmp_eh_prep(struct ata_port *ap, unsigned int pmp_map) { - struct ata_eh_info *ehi; unsigned int pmp; /* * Initialize EH info for PMPs which saw device errors */ - ehi = &ap->link.eh_info; for (pmp = 0; pmp_map != 0; pmp++) { unsigned int this_pmp = (1 << pmp); if (pmp_map & this_pmp) { struct ata_link *link = &ap->pmp_link[pmp]; + struct ata_eh_info *ehi = &link->eh_info; pmp_map &= ~this_pmp; - ehi = &link->eh_info; ata_ehi_clear_desc(ehi); ata_ehi_push_desc(ehi, "dev err"); ehi->err_mask |= AC_ERR_DEV; @@ -3877,7 +3875,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx) " and avoid the final two gigabytes on" " all RocketRAID BIOS initialized drives.\n"); } - /* drop through */ + /* fall through */ case chip_6042: hpriv->ops = &mv6xxx_ops; hp_flags |= MV_HP_GEN_IIE; diff --git a/drivers/ata/sata_rcar.c b/drivers/ata/sata_rcar.c index 537d11869069..80ee2f2a50d0 100644 --- a/drivers/ata/sata_rcar.c +++ b/drivers/ata/sata_rcar.c @@ -872,7 +872,6 @@ MODULE_DEVICE_TABLE(of, sata_rcar_match); static int sata_rcar_probe(struct platform_device *pdev) { - const struct of_device_id *of_id; struct ata_host *host; struct sata_rcar_priv *priv; struct resource *mem; @@ -888,11 +887,7 @@ static int sata_rcar_probe(struct platform_device *pdev) if (!priv) return -ENOMEM; - of_id = of_match_device(sata_rcar_match, &pdev->dev); - if (!of_id) - return -ENODEV; - - priv->type = (enum sata_rcar_type)of_id->data; + priv->type = (enum sata_rcar_type)of_device_get_match_data(&pdev->dev); priv->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(priv->clk)) { dev_err(&pdev->dev, "failed to get access to sata clock\n"); diff --git a/include/linux/libata.h b/include/linux/libata.h index 931c32f1f18d..ed9826b21c5e 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -522,6 +522,7 @@ enum ata_lpm_policy { ATA_LPM_UNKNOWN, ATA_LPM_MAX_POWER, ATA_LPM_MED_POWER, + ATA_LPM_MED_POWER_WITH_DIPM, /* Med power + DIPM as win IRST does */ ATA_LPM_MIN_POWER, }; |