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| author | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> | 2018-11-09 10:42:06 +0900 |
|---|---|---|
| committer | Philipp Zabel <p.zabel@pengutronix.de> | 2019-01-07 16:38:51 +0100 |
| commit | 69af3d1b8a91cf9b426c4238964df847036bf214 (patch) | |
| tree | 2f993cc6a2efc49835717cc2d951ab90cce3a9b8 | |
| parent | 3eb8f765f5aeca6e4195246f41e534025f69eee8 (diff) | |
dt-bindings: reset: uniphier: Add AHCI core reset description
Add compatible strings for reset control of AHCI core implemented in
UniPhier SoCs. The reset control belongs to AHCI glue layer.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| -rw-r--r-- | Documentation/devicetree/bindings/reset/uniphier-reset.txt | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/reset/uniphier-reset.txt b/Documentation/devicetree/bindings/reset/uniphier-reset.txt index f63c511a9de8..ea005177d20a 100644 --- a/Documentation/devicetree/bindings/reset/uniphier-reset.txt +++ b/Documentation/devicetree/bindings/reset/uniphier-reset.txt @@ -133,6 +133,9 @@ Required properties: "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB3 "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB3 "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC USB3 + "socionext,uniphier-pro4-ahci-reset" - for Pro4 SoC AHCI + "socionext,uniphier-pxs2-ahci-reset" - for PXs2 SoC AHCI + "socionext,uniphier-pxs3-ahci-reset" - for PXs3 SoC AHCI - #reset-cells: Should be 1. - reg: Specifies offset and length of the register set for the device. - clocks: A list of phandles to the clock gate for the glue layer. |