diff options
| author | Vivien Didelot <vivien.didelot@savoirfairelinux.com> | 2017-05-01 14:05:26 -0400 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2017-05-01 15:03:13 -0400 |
| commit | 1ac758648b574d3d01a648fc7018fc8b0bb7454a (patch) | |
| tree | b0db4be986c64957038facc6ba4e69d0bff55ba3 | |
| parent | 567aa59a8b055bb5853bc7e5d5f8ac191216c9c7 (diff) | |
net: dsa: mv88e6xxx: support the VTU Page bit
Newer chips such as the 88E6390 have a VTU Page bit in the VTU VID
register to specify a 13th bit for the VID. This can be used to support
8K VLANs.
When dumping the whole VTU, all VID bits must be set to one, including
this VTU Page bit. Add support for VID greater than 4095.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
| -rw-r--r-- | drivers/net/dsa/mv88e6xxx/global1_vtu.c | 7 | ||||
| -rw-r--r-- | drivers/net/dsa/mv88e6xxx/mv88e6xxx.h | 1 |
2 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/global1_vtu.c b/drivers/net/dsa/mv88e6xxx/global1_vtu.c index 469056d0b421..8e77974fb2f8 100644 --- a/drivers/net/dsa/mv88e6xxx/global1_vtu.c +++ b/drivers/net/dsa/mv88e6xxx/global1_vtu.c @@ -95,6 +95,10 @@ static int mv88e6xxx_g1_vtu_vid_read(struct mv88e6xxx_chip *chip, return err; entry->vid = val & 0xfff; + + if (val & GLOBAL_VTU_VID_PAGE) + entry->vid |= 0x1000; + entry->valid = !!(val & GLOBAL_VTU_VID_VALID); return 0; @@ -105,6 +109,9 @@ static int mv88e6xxx_g1_vtu_vid_write(struct mv88e6xxx_chip *chip, { u16 val = entry->vid & 0xfff; + if (entry->vid & 0x1000) + val |= GLOBAL_VTU_VID_PAGE; + if (entry->valid) val |= GLOBAL_VTU_VID_VALID; diff --git a/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h b/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h index a0d57b10acfe..77236cd72df2 100644 --- a/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h +++ b/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h @@ -249,6 +249,7 @@ #define GLOBAL_VTU_OP_STU_GET_NEXT ((0x06 << 12) | GLOBAL_VTU_OP_BUSY) #define GLOBAL_VTU_VID 0x06 #define GLOBAL_VTU_VID_MASK 0xfff +#define GLOBAL_VTU_VID_PAGE BIT(13) #define GLOBAL_VTU_VID_VALID BIT(12) #define GLOBAL_VTU_DATA_0_3 0x07 #define GLOBAL_VTU_DATA_4_7 0x08 |