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authorChristoph Hellwig <hch@lst.de>2017-02-08 00:13:20 +0100
committerJens Axboe <axboe@fb.com>2017-02-13 15:43:31 -0700
commitc5c9b26ee5f1295c77d8f2ff5f804ed6c0b07cc4 (patch)
treebdded9c8e3d186cccd0ac22dfc9f056b6bf379b9
parentecdd09597a57251323b0de50e3d45e69298c4a83 (diff)
cciss: switch to pci_irq_alloc_vectors
Simple cleanup to use the new APIs. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Don Brace <don.brace@microsemi.com> Tested-by: Don Brace <don.brace@microsemi.com> Signed-off-by: Jens Axboe <axboe@fb.com>
-rw-r--r--drivers/block/cciss.c54
-rw-r--r--drivers/block/cciss.h6
2 files changed, 17 insertions, 43 deletions
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c
index e5c5b8eb14a9..3a44438a1195 100644
--- a/drivers/block/cciss.c
+++ b/drivers/block/cciss.c
@@ -4074,41 +4074,27 @@ clean_up:
static void cciss_interrupt_mode(ctlr_info_t *h)
{
-#ifdef CONFIG_PCI_MSI
- int err;
- struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
- {0, 2}, {0, 3}
- };
+ int ret;
/* Some boards advertise MSI but don't really support it */
if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
(h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
goto default_int_mode;
- if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
- err = pci_enable_msix_exact(h->pdev, cciss_msix_entries, 4);
- if (!err) {
- h->intr[0] = cciss_msix_entries[0].vector;
- h->intr[1] = cciss_msix_entries[1].vector;
- h->intr[2] = cciss_msix_entries[2].vector;
- h->intr[3] = cciss_msix_entries[3].vector;
- h->msix_vector = 1;
- return;
- } else {
- dev_warn(&h->pdev->dev,
- "MSI-X init failed %d\n", err);
- }
- }
- if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
- if (!pci_enable_msi(h->pdev))
- h->msi_vector = 1;
- else
- dev_warn(&h->pdev->dev, "MSI init failed\n");
+ ret = pci_alloc_irq_vectors(h->pdev, 4, 4, PCI_IRQ_MSIX);
+ if (ret >= 0) {
+ h->intr[0] = pci_irq_vector(h->pdev, 0);
+ h->intr[1] = pci_irq_vector(h->pdev, 1);
+ h->intr[2] = pci_irq_vector(h->pdev, 2);
+ h->intr[3] = pci_irq_vector(h->pdev, 3);
+ return;
}
+
+ ret = pci_alloc_irq_vectors(h->pdev, 1, 1, PCI_IRQ_MSI);
+
default_int_mode:
-#endif /* CONFIG_PCI_MSI */
/* if we get here we're going to use the default interrupt mode */
- h->intr[h->intr_mode] = h->pdev->irq;
+ h->intr[h->intr_mode] = pci_irq_vector(h->pdev, 0);
return;
}
@@ -4888,7 +4874,7 @@ static int cciss_request_irq(ctlr_info_t *h,
irqreturn_t (*msixhandler)(int, void *),
irqreturn_t (*intxhandler)(int, void *))
{
- if (h->msix_vector || h->msi_vector) {
+ if (h->pdev->msi_enabled || h->pdev->msix_enabled) {
if (!request_irq(h->intr[h->intr_mode], msixhandler,
0, h->devname, h))
return 0;
@@ -4934,12 +4920,7 @@ static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t *h)
int ctlr = h->ctlr;
free_irq(h->intr[h->intr_mode], h);
-#ifdef CONFIG_PCI_MSI
- if (h->msix_vector)
- pci_disable_msix(h->pdev);
- else if (h->msi_vector)
- pci_disable_msi(h->pdev);
-#endif /* CONFIG_PCI_MSI */
+ pci_free_irq_vectors(h->pdev);
cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
cciss_free_scatterlists(h);
cciss_free_cmd_pool(h);
@@ -5295,12 +5276,7 @@ static void cciss_remove_one(struct pci_dev *pdev)
cciss_shutdown(pdev);
-#ifdef CONFIG_PCI_MSI
- if (h->msix_vector)
- pci_disable_msix(h->pdev);
- else if (h->msi_vector)
- pci_disable_msi(h->pdev);
-#endif /* CONFIG_PCI_MSI */
+ pci_free_irq_vectors(h->pdev);
iounmap(h->transtable);
iounmap(h->cfgtable);
diff --git a/drivers/block/cciss.h b/drivers/block/cciss.h
index 7fda30e4a241..4affa94ca17b 100644
--- a/drivers/block/cciss.h
+++ b/drivers/block/cciss.h
@@ -90,8 +90,6 @@ struct ctlr_info
# define SIMPLE_MODE_INT 2
# define MEMQ_MODE_INT 3
unsigned int intr[4];
- unsigned int msix_vector;
- unsigned int msi_vector;
int intr_mode;
int cciss_max_sectors;
BYTE cciss_read;
@@ -333,7 +331,7 @@ static unsigned long SA5_performant_completed(ctlr_info_t *h)
*/
register_value = readl(h->vaddr + SA5_OUTDB_STATUS);
/* msi auto clears the interrupt pending bit. */
- if (!(h->msi_vector || h->msix_vector)) {
+ if (!(h->pdev->msi_enabled || h->pdev->msix_enabled)) {
writel(SA5_OUTDB_CLEAR_PERF_BIT, h->vaddr + SA5_OUTDB_CLEAR);
/* Do a read in order to flush the write to the controller
* (as per spec.)
@@ -393,7 +391,7 @@ static bool SA5_performant_intr_pending(ctlr_info_t *h)
if (!register_value)
return false;
- if (h->msi_vector || h->msix_vector)
+ if (h->pdev->msi_enabled || h->pdev->msix_enabled)
return true;
/* Read outbound doorbell to flush */