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authorGeert Uytterhoeven <geert+renesas@glider.be>2019-06-07 13:28:48 +0200
committerTudor Ambarus <tudor.ambarus@microchip.com>2019-06-22 12:10:58 +0300
commit2d60d1f64b57b5a5cb259caa6fbe4aaa3f9def3a (patch)
tree2efab250ca1c1335085eb2c3f05b62250b842410
parent88489c29de60783a417c79ef418bedfec5d61fa1 (diff)
mtd: spi-nor: Spelling s/Writ/Write/
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
-rw-r--r--drivers/mtd/spi-nor/spi-nor.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index f87e18e125fd..9d03fe50533e 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -200,7 +200,7 @@ struct sfdp_header {
* register does not modify status register 2.
* - 101b: QE is bit 1 of status register 2. Status register 1 is read using
* Read Status instruction 05h. Status register2 is read using
- * instruction 35h. QE is set via Writ Status instruction 01h with
+ * instruction 35h. QE is set via Write Status instruction 01h with
* two data bytes where bit 1 of the second byte is one.
* [...]
*/