diff options
| author | Philipp Zabel <p.zabel@pengutronix.de> | 2016-01-04 18:36:45 +0100 |
|---|---|---|
| committer | Philipp Zabel <p.zabel@pengutronix.de> | 2016-05-06 17:47:42 +0200 |
| commit | ac4b1280319c3032787ac95bfeff14a425c417bf (patch) | |
| tree | 082639baa8a594f6519d5f1102a087608bf0e2e2 | |
| parent | 4585945bf1d348d006f7270beea3dae09fee3413 (diff) | |
clk: mediatek: remove hdmitx_dig_cts from TOP clocks
The hdmitx_dig_cts clock signal is not a child of tvdpll_445p5m,
but is routed out of the HDMI PHY module.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
| -rw-r--r-- | drivers/clk/mediatek/clk-mt8173.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c index cf4fcb61ed28..10c986018a08 100644 --- a/drivers/clk/mediatek/clk-mt8173.c +++ b/drivers/clk/mediatek/clk-mt8173.c @@ -61,7 +61,6 @@ static const struct mtk_fixed_factor top_divs[] __initconst = { FACTOR(CLK_TOP_CLKRTC_INT, "clkrtc_int", "clk26m", 1, 793), FACTOR(CLK_TOP_FPC, "fpc_ck", "clk26m", 1, 1), - FACTOR(CLK_TOP_HDMITX_DIG_CTS, "hdmitx_dig_cts", "tvdpll_445p5m", 1, 3), FACTOR(CLK_TOP_HDMITXPLL_D2, "hdmitxpll_d2", "hdmitx_dig_cts", 1, 2), FACTOR(CLK_TOP_HDMITXPLL_D3, "hdmitxpll_d3", "hdmitx_dig_cts", 1, 3), |