diff options
author | Bard Liao <bardliao@realtek.com> | 2017-09-13 14:50:17 +0800 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2017-09-28 09:42:37 -0700 |
commit | d0817657f615ecdf1c7beceade20c7d368003875 (patch) | |
tree | d18e75735c408f27d49aaeca0896cc075636fb8f | |
parent | 8e1b1785489b8b53b4ff934e0ad9259952817f5b (diff) |
ASoC: rt5670: add set_bclk_ratio in dai ops
We need to set a specific bit for 50 bclk rate. So add set_bclk_ratio
function to set the bit.
Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | sound/soc/codecs/rt5670.c | 19 | ||||
-rw-r--r-- | sound/soc/codecs/rt5670.h | 4 |
2 files changed, 23 insertions, 0 deletions
diff --git a/sound/soc/codecs/rt5670.c b/sound/soc/codecs/rt5670.c index be945b345b43..c5094b4399e2 100644 --- a/sound/soc/codecs/rt5670.c +++ b/sound/soc/codecs/rt5670.c @@ -2600,6 +2600,24 @@ static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, return 0; } +static int rt5670_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio) +{ + struct snd_soc_codec *codec = dai->codec; + + dev_dbg(codec->dev, "%s ratio=%d\n", __func__, ratio); + if (dai->id != RT5670_AIF1) + return 0; + + if ((ratio % 50) == 0) + snd_soc_update_bits(codec, RT5670_GEN_CTRL3, + RT5670_TDM_DATA_MODE_SEL, RT5670_TDM_DATA_MODE_50FS); + else + snd_soc_update_bits(codec, RT5670_GEN_CTRL3, + RT5670_TDM_DATA_MODE_SEL, RT5670_TDM_DATA_MODE_NOR); + + return 0; +} + static int rt5670_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { @@ -2730,6 +2748,7 @@ static const struct snd_soc_dai_ops rt5670_aif_dai_ops = { .set_fmt = rt5670_set_dai_fmt, .set_tdm_slot = rt5670_set_tdm_slot, .set_pll = rt5670_set_dai_pll, + .set_bclk_ratio = rt5670_set_bclk_ratio, }; static struct snd_soc_dai_driver rt5670_dai[] = { diff --git a/sound/soc/codecs/rt5670.h b/sound/soc/codecs/rt5670.h index 5ba485cae4e6..265df80d504e 100644 --- a/sound/soc/codecs/rt5670.h +++ b/sound/soc/codecs/rt5670.h @@ -1816,6 +1816,10 @@ #define RT5670_ZCD_HP_DIS (0x0 << 15) #define RT5670_ZCD_HP_EN (0x1 << 15) +/* General Control 3 (0xfc) */ +#define RT5670_TDM_DATA_MODE_SEL (0x1 << 11) +#define RT5670_TDM_DATA_MODE_NOR (0x0 << 11) +#define RT5670_TDM_DATA_MODE_50FS (0x1 << 11) /* Codec Private Register definition */ /* 3D Speaker Control (0x63) */ |