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authorOlof Johansson <olof@lixom.net>2021-06-12 08:55:15 -0700
committerOlof Johansson <olof@lixom.net>2021-06-12 08:55:17 -0700
commite60cb06cde7e57d73900ed9be448e074ce04707a (patch)
tree699483539d88e377def901500a0917c0d5233f1d
parent37c2a42930e16d4e8c3b0a1bb67d12aa6f083e56 (diff)
parent8efe01b4386ab38a36b99cfdc1dc02c38a8898c3 (diff)
Merge tag 'v5.13-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes
Fix PCIe address ranges that are affected by recent PCI changes. There are 3 additional patches pending that handle the backward compatiblity inside the PCI subsystem, but the address ranges should be fixed anyway. * tag 'v5.13-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: Update RK3399 PCI host bridge window to 32-bit address memory Link: https://lore.kernel.org/r/3405741.0S5aU1g85B@diego Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 634a91af8e83..4b854eb21f72 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -227,7 +227,7 @@
<&pcie_phy 2>, <&pcie_phy 3>;
phy-names = "pcie-phy-0", "pcie-phy-1",
"pcie-phy-2", "pcie-phy-3";
- ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000>,
+ ranges = <0x82000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000>,
<0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>;
resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
<&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>,